Addison Snell and Michael Feldman discuss Cray's disappointing quarterly earnings and a report offering a new path to the continuation of Moore's Law.

Microsoft has added two of NVIDIA’s premier GPUs into its Azure public cloud offering.  According to a blog post by Azure Director of Program Management Cory Sanders, the company has created two new lines of virtual machine instances, one based on the Tesla K80, the other on the Tesla M60.

A server equipped with 20 overclocked NVIDIA K40 GPUs and intended for deep learning work, has been built by a team of developers from CoCoLink, a South Korean HPC provider, and Orange Silicon Valley, a California-based technology innovation group. According to the press release, the constructed prototype is capable of delivering 100 single precision teraflops and is the worlds highest density deep learning supercomputer.

Its that time of year again when Panasas rolls out its latest ActiveStor offering, the companys scale-out network attached storage (NAS) product aimed at high performance computing customers. This season's offering, the ActiveStor 20, raises the bar on both capacity and speed, promising support for more than 45 PB in a single namespace, with aggregate I/O speeds of up 360 GB/second and 2.6 million IOPS.

A new report put out by a consortium of semiconductor industry groups is predicting that Moores Law will be renewed in the next decade by transitioning from CMOS technology to something called 3D Power Scaling. The transition will rely on developing a new breed of low-power transistors that can be manufactured into three-dimensional structures. According to the report, the technology could even accelerate the cadence of Moores Law beyond its nominal 2x-per-2-year rhythm.

Addison Snell and Chris Willard discuss machine learning from Wave Computing, plus three new research reports from Intersect360 Research.

AMD has flirted with the idea of building big brawny APUs for servers ever since the company starting developing the CPU-GPU hybrid chips begin back in 2006. Combining x86 and Radeon silicon on the same die for desktops and laptops was the basis for AMDs original Fusion processor, later renamed as the Accelerated Processing Unit (APU). Now with the anticipation of the next-generation Zen CPU core and the future Vega GPU, it looks like a high-performance server APU could finally become a reality.

Performing apples-to-apples optimized performance comparisons between different machine architectures is always a challenge. Intel has observed that the CPU implementations of many machine learning and deep learning packages have not been fully optimized for modern CPU architectures. For this reason, Intel made a number of machine learning announcements following the recent launch of Intel Xeon Phi (formerly Knights Landing) processors.

The GPU rumor mill was grinding away this week with talk of an accelerated launch for NVIDIAs next-generation Volta processor. Volta is the architecture that will succeed the current-generation Pascal design, which is the basis for the Tesla P100 GPUs destined for the HPC and deep learning markets. According to a report in Fudzilla,the first Volta parts may show up in 2017, a year ahead of NVIDIAs original schedule.

Network latency and bandwidth often turn out to be choke points on application performance for many HPC codes. As a result, the network component for HPC systems has successfully resisted the trend toward general-purpose solutions, Ethernet notwithstanding. Such an environment is conducive to greater innovation and experimentation, as is exemplified in EXTOLLs network technology