In Depth News

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IBM Ups Its Game with the Power9 Processor

IBM is looking to take a bigger slice out of Intel’s lucrative server business with Power9, the company’s latest and greatest processor for the datacenter. Scheduled for initial release in 2017, the Power9 promises more cores and a hefty performance boost compared to its Power8 predecessor. The new chip was described at the Hot Chips event, which took place in Silicon Valley this week.

Supercomputing Gets a Shot in the ARM

The prospects for another serious rival to the x86 processor in the high performance computing space are looking much better this week after ARM Holdings presented the company’s plan to offer an HPC version of its 64-bit architecture. Known as ARMv8-A SVE, the design incorporates a technology known as the Scalable Vector Extension (SVE), which will provide a unique type of flexibility with regard to vector processing -- the basis of many scientific and engineering workloads.

Next-Generation 3D Memory in the Works

At the Hot Chips symposium taking place in Cupertino, California this week, Samsung and SK hynix touted their latest efforts for high bandwidth memory (HBM), including the third iteration of the technology, known as HBM3. This new version promises to double bandwidth and density, while taking more direct aim at the high performance computing market.

Intel Unveils Plans for Knights Mill, a Xeon Phi for Deep Learning

At the Intel Developer Forum (IDF) this week in San Francisco, Intel revealed it is working on a new Xeon Phi processor aimed at deep learning applications. Diane Bryant, executive VP and GM of Intel's Data Center Group, unveiled the new chip, known as Knights Mill, during her IDF keynote address on Wednesday.

Micron Unveils 3D XPoint Products, Samsung Counters with Z-SSD

The prospects for significantly faster solid-state storage for servers got a big boost this past week with Micron’s introduction of its QuantX-branded 3D XPoint memory-based SSDs and Samsung’s preview of its upcoming Z-SSD devices. According to the companies, their respective products will deliver much better performance than conventional NAND-based PCIe SSDs currently used in the datacenter. The announcements were made at the Flash Memory Summit, a three-day extravaganza of all things non-volatile.

Hewlett Packard Enterprise to Reshape HPC Landscape with Planned Acquisition of SGI

HPE has signed an agreement to acquire SGI for $275 million, a deal that will bring together two of the top HPC system vendors under a single corporate master. Assuming the bid clears regulatory hurdles, the acquisition will represent the largest realignment of the HPC server space since IBM sold its x86 server business to Lenovo in 2014.

Intel Buys Deep Learning Specialist Nervana to Boost AI Portfolio

On Tuesday, Intel CEO Diane Bryant revealed her company was acquiring Nervana Systems, a startup that provides deep learning software, and which was in the process of building a custom chip optimized for those same applications. Intel has been ratcheting up its focus on AI over the past couple of months, starting with the launch of its Knights Corner Xeon Phi processor at the ISC conference in June.

Energy Efficiency Advances Sluggish on Latest Green500 List

The 19th edition of the Green500 was released today with the usual array of accelerated systems at the top of the list and a plethora of energy-sipping x86 clusters comprising the remainder. For the most part though, energy efficiency gains slowed over the past 12 months after chalking up some pretty impressive gains in previous years.

Next-Generation 3D Transistors Could Rejuvenate Moore’s Law

A new report put out by a consortium of semiconductor industry groups is predicting that Moore’s Law will be renewed in the next decade by transitioning from CMOS technology to something called “3D Power Scaling.” The transition will rely on developing a new breed of low-power transistors that can be manufactured into three-dimensional structures. According to the report, the technology could even accelerate the cadence of Moore’s Law beyond its nominal 2x-per-2-year rhythm.

Pondering AMD’s Ambitions for High-Performance APUs

AMD has flirted with the idea of building big brawny APUs for servers ever since the company starting developing the CPU-GPU hybrid chips begin back in 2006. Combining x86 and Radeon silicon on the same die for desktops and laptops was the basis for AMD’s original Fusion processor, later renamed as the Accelerated Processing Unit (APU). Now with the anticipation of the next-generation “Zen” CPU core and the future “Vega” GPU, it looks like a high-performance server APU could finally become a reality.