The Four-Way Race to Exascale


Until fairly recently, Japan was the only country in the world with a definitive roadmap to its first exascale supercomputer. But over the last three months, specific plans for exascale systems in China, France, and the US have been revealed. If those schedules hold, between 2020 and 2023, all four countries will stand up their first exascale machines. The race to the next supercomputing milestone is finally starting to take shape.

Of course any of these nations could build an exascale computer today, as long as they are willing to pay an exorbitant sum of money to buy an exaflops worth of 2016-era computing hardware, and then line up several hundred megawatts to power the beast. But even with that, one would have to compromise quite a bit on computational efficiency, given the slowness of current interconnects relative to the large number of nodes that would be required for an exaflop of performance. Then there’s the inconvenient fact there are neither applications nor system software that are exascale-ready, relegating such a system to a gargantuan job-sharing cluster.

As a result, a practical exascale supercomputer won’t be possible until some additional hardware innovation (not to mention software innovation) takes place, helped along by the transistor-shrinking magic of Moore’s Law. Now that the major players have plans in place to follow through with that innovation, it’s just a matter of which country gets there first.

The United States Brings Up the Rear

First we can dispense with the notion that the US will regain supercomputing supremacy during the exascale chase. The Department of Energy (DOE) is planning to bring two exascale machines to fruition by 2023, a full three years after what the other countries are targeting for their initial systems. Unless Japan, China, and France all falter badly, the US will not win the exascale race and will more than likely trail its three other competitors.

The 2023 date was formalized in the DOE’s Exascale Computing Plan (ECP), which was made public in April 2016. ECP hardware development will be done under the PathForward program, which will fund a number of vendors to conduct the necessary R&D. Those vendors have not yet been selected, but considering there are two systems being sought, it’s reasonable to assume that Intel, IBM, Cray, and NVIDIA will be tapped. 

Those are the same vendors tasked to provide the pre-exascale (100-plus petaflops) supercomputers under the DOE project known as CORAL (Collaboration of Oak Ridge, Argonne, and Lawrence Livermore). And if those systems are true precursors to the eventual exascale machines, one design will follow the IBM Power/NVIDIA GPU/Mellanox InfiniBand model, and the other will be based on Intel’s Xeon Phi/Omni-Path componentry. All of these technologies appear to be on a glidepath to support exascale systems on or even before the 2023 target date.

Japan Follows a Well-Worn Path

Japan put its exascale stake in the ground two years ago, declaring a plan to install its first system in 2019, with a 2020 date for full operation. The project that will drive this effort, known as Flagship 2020, was launched in April 2014 by the Ministry of Education, Culture, Sports, Science and Technology (MEXT). The RIKEN Advanced Institute for Computational Science will be the recipient of the first system, as well as a development partner. 

The supercomputer being envisioned is characterized as a successor to the K computer, so it’s no surprise that Fujitsu was selected as the principle contractor for the machine. Given that, one would expect that the 2020 system will be derived from Fujitsu’s PRIMEHPC FX100, the company’s current SPARC64-based supercomputer, which can scale up to 100 petaflops. Between now and then, there is plenty of time to develop another SPARC64 fx CPU and Tofu interconnect upgrade, which will provide the building blocks for an exascale design.

China Looks Inward for Supercomputing Answers

Earlier this month at the HPC Connections Workshop in Wuhan, China, it was revealed that a program to develop the country’s first exascale supercomputers has begun. The R&D funding for these systems is being done under the 13th Five-Year Development Plan, which kicked off in 2016. The first systems – and at this point it’s not clear how many are being considered – are scheduled to come online in 2020. 

Before the exascale revelation in May, China had only talked about pre-exascale systems, an effort being hampered by technology export controls instituted by the US. Nevertheless, China is expected to stand up two 100-plus petaflops systems before the comparable CORAL systems from the US are installed. 

As a result of those export controls, those pre-exascale supercomputers and the ensuing exascale machines will be powered by homegrown CPUs, interconnects, and other native componentry. The most likely China-made processors for these systems include the ShenWei CPUs, developed by Jiāngnán Computing Lab, and the FeiTeng CPUs, designed by a team at the National University of Defense Technology (NUDT). While these efforts are currently behind anything Intel, IBM, Fujitsu, NVIDIA, or AMD are currently working on, the Chinese government appears intent on devoting the necessary resources to bring one or both of these microprocessor architectures up to speed for HPC duty.

Atos Puts France on Exascale Map

Although Europe has a number of exascale R&D programs in motion under the Partnership for Advanced Computing in Europe (PRACE) umbrella, only France, and specifically French computer-maker Atos/Bull has a specific roadmap in place to develop and deliver an exascale supercomputer. In April, Atos revealed that its first customer for its exascale-capable Bull Sequana supercomputer will be the Commissariat à l’énergie atomique et aux énergies alternatives (CEA). CEA, which is a French organization analogous to the US DOE, has been a loyal customer for high-end Bull gear for some time, so it’s no surprise that they will be the proving ground for exascale in France.

Sequana is a fairly conventional design as supercomputers go. In its current rendition, the Sequana X1000, the system will support the latest Intel Xeon CPUs and Xeon Phi processors, as well as NVIDIA GPUs. Nodes can be linked together with either InfiniBand or the proprietary Bull eXascale Interconnect (BXI). The latter is being positioned as Sequana’s premier interconnect, so a future version of it will probably be the network of choice for the initial CEA exascale machine. As far as the processor goes, since CEA is in the process of installing a pre-exascale Sequana (the Tera 1000) with Xeon Phi processors, it stands to reason that the exascale follow-on will also employ these same chips, albeit more powerful ones than the current Knights Landing processors in production today.

Diversity Marks the Exascale Era

Since the Japanese, Chinese, and French exascale systems are all due to arrive in 2020, it’s pretty much of a toss-up which country will grab the exascale ring. Japan is probably a slight favorite to reach the milestone first, inasmuch as the scheduled installation date for the RIKEN machine is actually 2019. China, though, has a habit of delivering their top-end machines before they are, shall we say, fully cooked. So don’t be surprised if they find a way to edge out the competition with an early Linpack run.

What’s more interesting than any individual country’s actual placement in the exascale race is that, starting in 2020, the fastest systems in the world will be the most architecturally diverse machines since the early days of supercomputing. In aggregate, these first exascale systems could encompass six or more microprocessor architectures and as many as five interconnects. Memory technology is also diversifying, so we are apt to see a series of custom or semi-custom hierarchies based on various 3D memory devices and non-volatile memory modules, along with straight DRAM. 

Whether any of these initial exascale designs become more generalized HPC solutions remains to be seen. If historical precedent holds, none of them will, but history may be a poor guide in the post-petaflop world. With the end of Moore’s Law on the horizon, along with the expanding diversity of microprocessors, interconnects, and memory, the exascale era may end up being wildly unpredictable.

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