AMD Sets Launch Date for Next-Generation Processor


AMD has revealed that servers based on its future x86 datacenter processors, codenamed “Naples,” will be available in June. The company has branded the upcoming family of Zen-based server SoCs with the moniker, EPYC.

Initially scaling up to 32 cores, EPYC (pronounced “epic”) will become the basis for AMD’s datacenter aspirations going forward. The chips will be targeted to cloud, on-premise enterprise, and HPC customers. It will serve both dual-socket and single-socket configurations, with AMD placing a good deal of emphasis on the latter for certain workloads. More on this in a moment.

According to Forrest Norrod, senior vice president and general manager of Enterprise, Embedded & Semi-Custom Products, the upcoming product line will set a new standard for dual-socket performance and scalability. “With the new EPYC processor, AMD takes the next step on our journey in high-performance computing,” said Norrod, in a prepared statement.

As we reported in January when AMD released some of key specs and server reference designs for the new chip, the 32-core EPYC will support Zen’s simultaneous multi-threading (SMT) capability, which provides two virtual threads per core. It will also support eight memory channels per socket, providing up to two terabytes of capacity. In addition, the EPYC SoC will come equipped with fully integrated PCIe 3.0, supporting a whopping 128 lanes of I/O connectivity.

 

Source: AMD

 

All of that compares rather favorably with Intel’s current “Broadwell” Xeon processors, but since the new Skylake Xeon chips are slated for delivery in the same general timeframe as the AMD’s new offerings, the EPYC advantage in things like core count and memory capacity and performance will narrow somewhat. And since the Skylake Xeon will support the new extra-wide AVX-512 vector instructions, it’s likely that Intel will retain its advantage in floating point performance.

One thing AMD is making a big deal about with this announcement is the suitability of EPYC for single-socket servers. The rationale is that since the chip offers so many cores/threads, memory channels, and PCIe lanes, it’s now possible to do a lot of mainstream cloud and enterprise computing with just one processor, saving both CAPEX and OPEX.

Dropbox is apparently kicking the tires on such a configuration, with Akhil Gupta, vice president of infrastructure at Dropbox, noting that they are impressed with the initial results of their single-socket EPYC box. “The combination of core performance, memory bandwidth, and I/O support make EPYC a unique offering,” he said. “We look forward to continuing to evaluate EPYC as an option for our infrastructure.”

For HPC though, a single-socket server is probably not in the cards, with perhaps the notable exception of using such a configuration to drive multiple GPU accelerators. With all the PCIe lanes available in the SoC, at least six GPUs can be linked up with a single EPYC. AMD would love it if those were Radeon Vega GPUs, of course, but PCIe is not going to discriminate against NVIDIA gear.

Since specific EPYC SKUs have yet to be announced, pricing is not yet available. But it would surprise no one if AMD seriously undercut the pricing on Intel’s Skylake Xeon offerings. We’ll know in a few short months.

Current rating: 4.9

Comments

There are currently no comments

New Comment

required

required (not published)

optional