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Inside HPC

Forbes Lists Rich Brueckner as one of Top 20 Big Data Influencers
Are You an HPC Industry Insider?
AMD Doubles Down on Existing Opteron Server Sockets
Call for Posters: HPC in Asia Workshop at ISC’12
Video: Living with Thinking Machines
This Week on inside* Publications
Interview: Thomas Sterling – In Search of the Exascale Roadmap
Altair Aims to Ease Simulation With PBS Pro 11.2
Video: Energy Secretary Steven Chu Speaks at Ground Breaking for New LBNL Facility
Slidecast: GPU Computing and the Road to Extreme-Scale Parallel Systems
Cray XE6m Midrange System Weighs in at $31K per Teraflop
Seymour Cray – The First Iconic Figure in the Industry
Video: EPFL Scientists Develop 3D Chips
SGI Takes InfiniteStorage to 2.37 PB Per Rack
Allinea Adds Sparklines, Cuda 4.1 Toolkit Support to DDT 3.1 Parallel Debugger

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The CM-5 incorporates the first parallel supercomputer architecture that scales to TeraFLOPS.

TMC document - 11/91

Development over Time

Architectures Share Over Time

Architectures Share Over Time / Systems

Architectures Share Over Time / Performance

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