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HPCWire

UK Researchers Develop Silicon-Oxide Chip
Winners of Watson Academic Case Competition Announced
Numerix Portfolio Now Available Through Windows Azure
HPC User Forum to be Held in London, Stuttgart
Ciena Transferring 100G Traffic to Iceland with Single Fiber Pair
Mellanox Creates Ethernet to InfiniBand Interconnect for HP Servers
Podcast: NVIDIA's Kepler Debuts in HPC; Intel Adds to Chip Count
University of Southampton Builds UK's Largest Academic Supercomputer
DataDirect Networks to Support Storage on Open Compute Project Hardware
OpenACC Starts to Gather Developer Mindshare

Inside HPC

Video: GPUs Accelerate Risk Analysis for Financial Services
July HPC User Forums in London and Stuttgart
Kepler K10 Single-Precision GPU Speeds Oil & Gas
Slidecast: Allinea Software – Meeting the Quest to Run Applications Faster
Load Testing with the Cloud – This Week on inside* Publications
Student Cluster Competition Comes to ISC’12
Webinar: NSF Big Data Solicitation May 21
Interview: Author Rob Farber on the Secret Sauce for Programmers in the Kepler GPU
New Whitepaper: NVIDIA’s Next-Gen CUDA Compute Architecture – Kepler GK110
SGI Brings Kepler K10 GPU to Rackable Servers, K20 in the Fall
IDC Breakfast Briefing at ISC’12 on June 18
GPUs Power Penguin Computing, from HPC to Cloud and on to the Enterprise
End-users Need to Design Exascale Computers
GPUs Power Part-Time Scientists’ Plan for Lunar Rover Autonomy
Massively Parallel Simulation Counters Antibiotic Resistance

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The CM-5 incorporates the first parallel supercomputer architecture that scales to TeraFLOPS.

TMC document - 11/91

Snapshot In Time

Producing Region Share

Producing Region Share / Systems

Producing Region Share / Performance

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